"Guarded evaluation: pushing power management to logic synthesis/design."

Vivek Tiwari, Sharad Malik, Pranav Ashar (1998)

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DOI: 10.1109/43.728924

access: closed

type: Journal Article

metadata version: 2023-09-30

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Vivek Tiwari, Sharad Malik, Pranav Ashar:
Guarded evaluation: pushing power management to logic synthesis/design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10): 1051-1060 (1998)

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