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"Fast and exact transistor sizing based on iterative relaxation."

Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K. Parhi (2002)

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DOI: 10.1109/43.998628

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/SundararajanSP02
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  - https://dblp.org/rec/journals/tcad/SundararajanSP02
Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K. Parhi:
Fast and exact transistor sizing based on iterative relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5): 568-581 (2002)

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