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"Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets."

Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi (1997)

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DOI: 10.1109/43.573836

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/PullelaMP97
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  - https://dblp.org/rec/journals/tcad/PullelaMP97
Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi:
Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(2): 210-215 (1997)

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