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"Constrained test generation for embedded synchronous sequential circuits ..."

Irith Pomeranz (2004)

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DOI: 10.1109/TCAD.2003.819886

access: closed

type: Journal Article

metadata version: 2020-09-24

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Irith Pomeranz:
Constrained test generation for embedded synchronous sequential circuits with serial-input access. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1): 164-172 (2004)

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