"Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous ..."

Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda (2007)

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DOI: 10.1109/TCAD.2006.883912

access: closed

type: Journal Article

metadata version: 2020-09-24

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Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda:
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3): 592-605 (2007)

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