"Sequential logic optimization for low power using input-disabling ..."

José Monteiro, Srinivas Devadas, Abhijit Ghosh (1998)

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DOI: 10.1109/43.700725

access: closed

type: Journal Article

metadata version: 2022-02-23

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José Monteiro, Srinivas Devadas, Abhijit Ghosh:
Sequential logic optimization for low power using input-disabling precomputation architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(3): 279-284 (1998)

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