"On Delay Fault Testing in Logic Circuits."

Chin Jen Lin, Sudhakar M. Reddy (1987)

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DOI: 10.1109/TCAD.1987.1270315

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type: Journal Article

metadata version: 2020-09-24

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Chin Jen Lin, Sudhakar M. Reddy:
On Delay Fault Testing in Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(5): 694-703 (1987)

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