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"Optimization of high-speed CMOS logic circuits with analytical models for ..."

Bernhard Hoppe et al. (1990)

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DOI: 10.1109/43.46799

access: closed

type: Journal Article

metadata version: 2020-09-24

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Bernhard Hoppe, Gerd Neuendorf, Doris Schmitt-Landsiedel, J. Will Specks:
Optimization of high-speed CMOS logic circuits with analytical models for signal delay, chip area, and dynamic power dissipation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(3): 236-247 (1990)

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