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"Optimal testing of VLSI analog circuits."

Chieh-Yuan Chao, Hung-Jen Lin, L. Miler (1997)

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DOI: 10.1109/43.559332

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - https://dblp.org/rec/journals/tcad/ChaoLM97
Chieh-Yuan Chao, Hung-Jen Lin, L. Miler:
Optimal testing of VLSI analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(1): 58-77 (1997)

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