![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
"An Approach to Gate Assignment and Module Placement for Printed Wiring Boards."
Ikuo Nishioka et al. (1980)
- Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Toru Chiba, Isao Shirakawa, Hiroshi Ozaki:
An Approach to Gate Assignment and Module Placement for Printed Wiring Boards. IEEE Trans. Computers 29(8): 681-688 (1980)
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.