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"Utilization Aware Power Management in Reliable and Aggressive Chip Multi ..."

Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani (2016)

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DOI: 10.1109/TC.2015.2439277

access: closed

type: Journal Article

metadata version: 2017-05-20

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  dblp key:
  - journals/tc/AvirneniRS16
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  persistent URL:
  - https://dblp.org/rec/journals/tc/AvirneniRS16
Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani:
Utilization Aware Power Management in Reliable and Aggressive Chip Multi Processors. IEEE Trans. Computers 65(3): 979-991 (2016)

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