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"Low power process, voltage, and temperature (PVT) variations aware ..."

K. Niranjan Reddy, P. V. Y. Jayasree (2019)

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DOI: 10.1016/J.SUSCOM.2019.01.005

access: closed

type: Journal Article

metadata version: 2020-02-25

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K. Niranjan Reddy, P. V. Y. Jayasree:
Low power process, voltage, and temperature (PVT) variations aware improved tunnel FET on 6T SRAM cells. Sustain. Comput. Informatics Syst. 21: 143-153 (2019)

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