"Low power process, voltage, and temperature (PVT) variations aware ..."

K. Niranjan Reddy, P. V. Y. Jayasree (2019)

> Home

Details and statistics

DOI: 10.1016/J.SUSCOM.2019.01.005

access: closed

type: Journal Article

metadata version: 2020-02-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/suscom/ReddyJ19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/suscom/ReddyJ19
K. Niranjan Reddy, P. V. Y. Jayasree:
Low power process, voltage, and temperature (PVT) variations aware improved tunnel FET on 6T SRAM cells. Sustain. Comput. Informatics Syst. 21: 143-153 (2019)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.