"A VLSI array architecture for realization of DFT, DHT, DCT and DST."

Koushik Maharatna, A. S. Dhar, Swapna Banerjee (2001)

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DOI: 10.1016/S0165-1684(01)00061-5

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type: Journal Article

metadata version: 2022-07-06

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Koushik Maharatna, A. S. Dhar, Swapna Banerjee:
A VLSI array architecture for realization of DFT, DHT, DCT and DST. Signal Process. 81(9): 1813-1822 (2001)

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