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"An FPGA-based scalable simulation accelerator for tile architectures."

Shinya Takamaeda-Yamazaki et al. (2011)

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DOI: 10.1145/2082156.2082166

access: closed

type: Journal Article

metadata version: 2020-07-30

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  - journals/sigarch/Takamaeda-YamazakiSSK11
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  - https://dblp.org/rec/journals/sigarch/Takamaeda-YamazakiSSK11
Shinya Takamaeda-Yamazaki, Ryosuke Sasakawa, Yoshito Sakaguchi, Kenji Kise:
An FPGA-based scalable simulation accelerator for tile architectures. SIGARCH Comput. Archit. News 39(4): 38-43 (2011)

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