"Implementation and evaluation of an arithmetic pipeline on FLOPS-2D: ..."

Hirokazu Morishita et al. (2010)

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DOI: 10.1145/1926367.1926370

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type: Journal Article

metadata version: 2020-07-30

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Hirokazu Morishita, Kenta Inakagata, Yasunori Osana, Naoyuki Fujita, Hideharu Amano:
Implementation and evaluation of an arithmetic pipeline on FLOPS-2D: multi-FPGA system. SIGARCH Comput. Archit. News 38(4): 8-13 (2010)

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