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"Tests for small gate delay faults in combinational circuits and a test ..."

Hiroshi Takahashi et al. (1997)

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DOI: 10.1002/(SICI)1520-684X(19970615)28:6<68::AID-SCJ8>3.0.CO;2-K

access: closed

type: Journal Article

metadata version: 2023-09-13

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  - https://dblp.org/rec/journals/scjapan/TakahashiWMT97
Hiroshi Takahashi, Takashi Watanabe, Toshiyuki Matsunaga, Yuzo Takamatsu:
Tests for small gate delay faults in combinational circuits and a test generation method. Syst. Comput. Jpn. 28(6): 68-76 (1997)

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