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"Proposed low power, high speed adder-based 65-nm Square root circuit."

Chinnaiyan Senthilpari, Zuraida Irina Mohamad, S. Kavitha (2011)

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DOI: 10.1016/J.MEJO.2010.10.015

access: closed

type: Journal Article

metadata version: 2020-02-22

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  - https://dblp.org/rec/journals/mj/SenthilpariMK11
Chinnaiyan Senthilpari, Zuraida Irina Mohamad, S. Kavitha:
Proposed low power, high speed adder-based 65-nm Square root circuit. Microelectron. J. 42(2): 445-451 (2011)

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