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"Local bit line 8T SRAM based in-memory computing architecture for ..."
Anil Kumar Rajput, Manisha Pattanaik (2023)
- Anil Kumar Rajput, Manisha Pattanaik:
Local bit line 8T SRAM based in-memory computing architecture for energy-efficient linear error correction codec implementation. Microelectron. J. 137: 105795 (2023)
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