"A high stable 8T-SRAM with bit interleaving capability for minimization of ..."

Debasish Nayak et al. (2018)

> Home

Details and statistics

DOI: 10.1016/J.MEJO.2018.01.008

access: closed

type: Journal Article

metadata version: 2020-10-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mj/NayakARN18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mj/NayakARN18
Debasish Nayak, Debiprasad Priyabrata Acharya, Prakash Kumar Rout, Umakanta Nanda:
A high stable 8T-SRAM with bit interleaving capability for minimization of soft error rate. Microelectron. J. 73: 43-51 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.