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"A high performance hardware architecture for non-negative tensor ..."

Biao Min et al. (2019)

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DOI: 10.1016/J.MEJO.2018.11.006

access: closed

type: Journal Article

metadata version: 2020-02-22

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Biao Min, Wei-pei Huang, Ray C. C. Cheung, Hong Yan:
A high performance hardware architecture for non-negative tensor factorization. Microelectron. J. 85: 25-33 (2019)

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