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"System level fault-tolerance core mapping and FPGA-based verification of NoC."

Naresh Kumar Reddy Becchu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra (2017)

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DOI: 10.1016/J.MEJO.2017.09.010

access: closed

type: Journal Article

metadata version: 2020-02-22

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  - journals/mj/BecchuHB17
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  - https://dblp.org/rec/journals/mj/BecchuHB17
Naresh Kumar Reddy Becchu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra:
System level fault-tolerance core mapping and FPGA-based verification of NoC. Microelectron. J. 70: 16-26 (2017)

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