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"FPGA implementation of highly scalable AES algorithm using modified mix ..."
S. Madhavapandian, P. Maruthupandi (2020)
- S. Madhavapandian, P. Maruthupandi:
FPGA implementation of highly scalable AES algorithm using modified mix column with gate replacement technique for security application in TCP/IP. Microprocess. Microsystems 73: 102972 (2020)
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