Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"FPGA implementation of IFFT architecture with enhanced pruning algorithm ..."

Abraham Chavacheril Geevarghese, Madheswaran Muthusamy (2019)

> Home

Details and statistics

DOI: 10.1016/J.MICPRO.2019.06.010

access: closed

type: Journal Article

metadata version: 2020-10-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mam/GeevargheseM19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mam/GeevargheseM19
Abraham Chavacheril Geevarghese, Madheswaran Muthusamy:
FPGA implementation of IFFT architecture with enhanced pruning algorithm for low power application. Microprocess. Microsystems 71 (2019)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.