Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Evaluation of low power consumption network on chip routing architecture."

T. S. Arulananth et al. (2021)

> Home

Details and statistics

DOI: 10.1016/J.MICPRO.2020.103809

access: closed

type: Journal Article

metadata version: 2023-03-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mam/ArulananthBMTDR21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mam/ArulananthBMTDR21
T. S. Arulananth, Manickam Baskar, Udhaya Sankar S. M, R. Thiagarajan, G. Arul Dalton, Pasupuleti Raja Rajeshwari, Aruru Sai Kumar, Suresh A:
Evaluation of low power consumption network on chip routing architecture. Microprocess. Microsystems 82: 103809 (2021)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.