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@article{DBLP:journals/jssc/ShibataMIINFSHH08,
  author    = {Noboru Shibata and
               Hiroshi Maejima and
               Katsuaki Isobe and
               Kiyoaki Iwasa and
               Michio Nakagawa and
               Masaki Fujiu and
               Takahiro Shimizu and
               Mitsuaki Honma and
               Satoru Hoshi and
               Toshimasa Kawaai and
               Kazunori Kanebako and
               Susumu Yoshikawa and
               Hideyuki Tabata and
               Atsushi Inoue and
               Toshiyuki Takahashi and
               Toshifumi Shano and
               Yukio Komatsu and
               Katsushi Nagaba and
               Mitsuhiko Kosakai and
               Noriaki Motohashi and
               Kazuhisa Kanazawa and
               Kenichi Imamiya and
               Hiroto Nakai and
               Menahem Lasser and
               Mark Murin and
               Avraham Meir and
               Arik Eyal and
               Mark Shlick},
  title     = {A 70 nm 16 Gb 16-Level-Cell {NAND} flash Memory},
  journal   = {{IEEE} J. Solid State Circuits},
  volume    = {43},
  number    = {4},
  pages     = {929--937},
  year      = {2008},
  url       = {https://doi.org/10.1109/JSSC.2008.917559},
  doi       = {10.1109/JSSC.2008.917559},
  timestamp = {Sun, 30 Aug 2020 00:12:36 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/ShibataMIINFSHH08.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}