BibTeX record journals/jssc/OgiwaraTIMTDTKS00

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@article{DBLP:journals/jssc/OgiwaraTIMTDTKS00,
  author    = {Ryu Ogiwara and
               Sumio Tanaka and
               Yasuo Itoh and
               Tadashi Miyakawa and
               Yoshiaki Takeuchi and
               Sumiko Mano Doumae and
               Hiroyuki Takenaka and
               Iwao Kunishima and
               Susumu Shuto and
               Osamu Hidaka and
               Sumito Ohtsuki and
               Shin'ichi Tanaka},
  title     = {A 0.5-{\(\mu\)}m, 3-V 1T1C, 1-Mbit {FRAM} with a variable reference
               bit-line voltage scheme using a fatigue-free reference capacitor},
  journal   = {{IEEE} J. Solid State Circuits},
  volume    = {35},
  number    = {4},
  pages     = {545--551},
  year      = {2000},
  url       = {https://doi.org/10.1109/4.839914},
  doi       = {10.1109/4.839914},
  timestamp = {Wed, 13 Apr 2022 09:14:08 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/OgiwaraTIMTDTKS00.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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