"A novel memory cell for multiport RAM on 0.5 μm CMOS Sea-of-Gates."

Koji Nii et al. (1995)

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DOI: 10.1109/4.364448

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type: Journal Article

metadata version: 2023-05-09

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Koji Nii, Hideshi Maeno, Tokuya Osawa, Shuhei Iwade, Shinpei Kayano, Hiroshi Shibata:
A novel memory cell for multiport RAM on 0.5 μm CMOS Sea-of-Gates. IEEE J. Solid State Circuits 30(3): 316-320 (1995)

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