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"Cache-processor coupling: a fast and wide on-chip data cache design."

Masato Motomura et al. (1995)

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DOI: 10.1109/4.375956

access: closed

type: Journal Article

metadata version: 2023-06-26

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Masato Motomura, Toshiaki Inoue, Hachiro Yamada, Akihiko Konagaya:
Cache-processor coupling: a fast and wide on-chip data cache design. IEEE J. Solid State Circuits 30(4): 375-382 (1995)

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