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"A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS."

Mozhgan Mansuri et al. (2013)

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DOI: 10.1109/JSSC.2013.2279052

access: closed

type: Journal Article

metadata version: 2020-08-30

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  - https://dblp.org/rec/journals/jssc/MansuriJKHSBORMC13
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper:
A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. IEEE J. Solid State Circuits 48(12): 3229-3242 (2013)

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