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"Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With ..."

Lukas Kull et al. (2016)

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DOI: 10.1109/JSSC.2016.2519397

access: closed

type: Journal Article

metadata version: 2023-09-30

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Lukas Kull, Jan Plíva, Thomas Toifl, Martin L. Schmatz, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Yusuf Leblebici:
Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With Optimized Input Bandwidth in 32 nm CMOS. IEEE J. Solid State Circuits 51(3): 636-648 (2016)

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