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"A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End ..."

Hiroshi Kimura et al. (2014)

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DOI: 10.1109/JSSC.2014.2349974

access: open

type: Journal Article

metadata version: 2020-08-30

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  - journals/jssc/KimuraAJSKNGJHLZKKCSGZLWMLAZ14
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  - https://dblp.org/rec/journals/jssc/KimuraAJSKNGJHLZKKCSGZLWMLAZ14
Hiroshi Kimura, Pervez M. Aziz, Tai Jing, Ashutosh Sinha, Shiva Prasad Kotagiri, Ram Narayan, Hairong Gao, Ping Jing, Gary Hom, Anshi Liang, Eric Zhang, Aniket Kadkol, Ruchi Kothari, Gordon Chan, Yehui Sun, Benjamin Ge, Jason Zeng, Kathy Ling, Michael C. Wang, Amaresh V. Malipatil, Lijun Li, Christopher J. Abel, Freeman Zhong:
A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS. IEEE J. Solid State Circuits 49(12): 3091-3103 (2014)

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