Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A 667-Mb/s operating digital DLL architecture for 512-Mb DDR SDRAM."

Takeshi Hamamoto et al. (2004)

> Home

Details and statistics

DOI: 10.1109/JSSC.2003.820851

access: closed

type: Journal Article

metadata version: 2022-04-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/HamamotoFKKIKKY04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/HamamotoFKKIKKY04
Takeshi Hamamoto, Kiyohiro Furutani, Takashi Kubo, Satoshi Kawasaki, Hironori Iga, Takashi Kono, Yasuhiro Konishi, Tsutomu Yoshihara:
A 667-Mb/s operating digital DLL architecture for 512-Mb DDR SDRAM. IEEE J. Solid State Circuits 39(1): 194-206 (2004)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.