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"Ultra-Low Power 18-Transistor Fully Static Contention-Free Single-Phase ..."

Yunpeng Cai et al. (2019)

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DOI: 10.1109/JSSC.2018.2875089

access: closed

type: Journal Article

metadata version: 2020-08-30

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Yunpeng Cai, Anand Savanth, Pranay Prabhat, James Myers, Alex S. Weddell, Tom J. Kazmierski:
Ultra-Low Power 18-Transistor Fully Static Contention-Free Single-Phase Clocked Flip-Flop in 65-nm CMOS. IEEE J. Solid State Circuits 54(2): 550-559 (2019)

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