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"Concordant memory design: an integrated statistical design approach for ..."

Satoru Akiyama et al. (2006)

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DOI: 10.1109/JSSC.2005.859023

access: closed

type: Journal Article

metadata version: 2022-01-03

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Satoru Akiyama, Tomonori Sekiguchi, Kazuhiko Kajigaya, Satoru Hanzawa, Riichiro Takemura, Takayuki Kawahara:
Concordant memory design: an integrated statistical design approach for multi-gigabit DRAM. IEEE J. Solid State Circuits 41(1): 107-112 (2006)

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