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"Evaluation of delay fault testability of LUTs for the enhancement of ..."

Andrzej Krasniewski (2003)

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DOI: 10.1016/S1383-7621(03)00066-3

access: closed

type: Journal Article

metadata version: 2021-10-14

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  - https://dblp.org/rec/journals/jsa/Krasniewski03
Andrzej Krasniewski:
Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs. J. Syst. Archit. 49(4-6): 283-296 (2003)

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