"Designing efficient accelerator of depthwise separable convolutional ..."

Wei Ding et al. (2019)

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DOI: 10.1016/J.SYSARC.2018.12.008

access: closed

type: Journal Article

metadata version: 2025-01-19

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Wei Ding, Zeyu Huang, Zunkai Huang, Li Tian, Hui Wang, Songlin Feng:
Designing efficient accelerator of depthwise separable convolutional neural network on FPGA. J. Syst. Archit. 97: 278-286 (2019)

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