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"Level-2 cache for high performance /390 μ-processors."

H. Barsuhn et al. (1992)

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DOI: 10.1016/0165-6074(92)90332-2

access: closed

type: Journal Article

metadata version: 2020-05-19

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  - journals/jsa/BarsuhnLWWC92
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  - https://dblp.org/rec/journals/jsa/BarsuhnLWWC92
H. Barsuhn, W. Lochlein, D. Wendel, U. Wille, P. Coppens:
Level-2 cache for high performance /390 μ-processors. Microprocess. Microprogramming 35(1-5): 303-309 (1992)

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