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ORCID"Design of Peripheral Circuits for the Implementation of Memory Array Using ..."
Ajay Kumar Singh, Mohammad-Sadegh Saadatzi, C. Venkataseshaiah (2016)
- Ajay Kumar Singh, Mohammad-Sadegh Saadatzi, C. Venkataseshaiah:
Design of Peripheral Circuits for the Implementation of Memory Array Using Data-Aware (DA) SRAM Cell in 65 nm CMOS Technology for Low Power Consumption. J. Low Power Electron. 12(1): 9-20 (2016)
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