Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"MLTimer: Leakage Power Minimization in Digital Circuits Using Machine ..."

Patanjali SLPSK et al. (2018)

> Home

Details and statistics

DOI: 10.1166/JOLPE.2018.1549

access: closed

type: Journal Article

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jolpe/SLPSKPPK18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jolpe/SLPSKPPK18
Patanjali SLPSK, Milan Patnaik, Seetal Potluri, V. Kamakoti:
MLTimer: Leakage Power Minimization in Digital Circuits Using Machine Learning and Adaptive Lazy Timing Analysis. J. Low Power Electron. 14(2): 285-301 (2018)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.