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ORCID"A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS ..."
Shibaji Banerjee et al. (2011)
- Shibaji Banerjee, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan, Maciej J. Ciesielski:
A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS Register-Transfer Level Leakage Optimization. J. Low Power Electron. 7(4): 471-481 (2011)
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