"Design of a Bit-Interleaved Low Power 10T SRAM Cell with Enhanced Stability."

P. V. Sridevi (2021)

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DOI: 10.1142/S0218126621501425

access: closed

type: Journal Article

metadata version: 2021-07-23

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P. V. Sridevi:
Design of a Bit-Interleaved Low Power 10T SRAM Cell with Enhanced Stability. J. Circuits Syst. Comput. 30(8): 2150142:1-2150142:21 (2021)

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