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"Design and FPGA Implementation of Digit-Serial Modified Booth Multipliers."

Janardhan H. Satyanarayana, Behrouz Nowrouzian (1996)

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DOI: 10.1142/S0218126696000339

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - journals/jcsc/SatyanarayanaN96
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  - https://dblp.org/rec/journals/jcsc/SatyanarayanaN96
Janardhan H. Satyanarayana, Behrouz Nowrouzian:
Design and FPGA Implementation of Digit-Serial Modified Booth Multipliers. J. Circuits Syst. Comput. 6(5): 485-502 (1996)

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