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"An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier ..."

S. Radhakrishnan, Rakesh Kumar Karn, T. Nirmalraj (2021)

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DOI: 10.1142/S0218126621500377

access: closed

type: Journal Article

metadata version: 2022-06-23

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  - https://dblp.org/rec/journals/jcsc/RadhakrishnanKN21
S. Radhakrishnan, Rakesh Kumar Karn, T. Nirmalraj:
An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier for Signal Processing Applications. J. Circuits Syst. Comput. 30(3): 2150037:1-2150037:23 (2021)

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