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"YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine ..."

Khyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar (2019)

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DOI: 10.1142/S0218126619502025

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - https://dblp.org/rec/journals/jcsc/ParanePT19
Khyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar:
YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Supporting Congestion-Aware Adaptive Routing Using FPGAs. J. Circuits Syst. Comput. 28(12): 1950202:1-1950202:31 (2019)

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