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"Reduction of Circuit Devices in Developed Symmetrical/Asymmetrical ..."

Mohammad Reza Jannati Oskuee et al. (2016)

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DOI: 10.1142/S0218126616500201

access: closed

type: Journal Article

metadata version: 2023-11-12

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  - journals/jcsc/OskueeKRG16
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  - https://dblp.org/rec/journals/jcsc/OskueeKRG16
Mohammad Reza Jannati Oskuee, Sahar Khalilnasab, Sajad Najafi Ravadanegh, Gevork B. Gharehpetian:
Reduction of Circuit Devices in Developed Symmetrical/Asymmetrical Multilevel Converters. J. Circuits Syst. Comput. 25(4): 1650020:1-1650020:18 (2016)

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