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"A Memory Efficient, Multiplierless & Modular VLSI Architecture of ..."

Anirban Chakraborty, Ayan Banerjee (2020)

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DOI: 10.1142/S0218126620501510

access: closed

type: Journal Article

metadata version: 2023-08-21

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  - https://dblp.org/rec/journals/jcsc/ChakrabortyB20
Anirban Chakraborty, Ayan Banerjee:
A Memory Efficient, Multiplierless & Modular VLSI Architecture of 1D/2D Re-Configurable 9/7 & 5/3 DWT Filters Using Distributed Arithmetic. J. Circuits Syst. Comput. 29(9): 2050151:1-2050151:29 (2020)

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