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"A PLL-based synthesizer for tunable digital clock generation in a ..."

Jokin Segundo et al. (2009)

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DOI: 10.1016/J.VLSI.2008.07.002

access: closed

type: Journal Article

metadata version: 2021-08-09

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Jokin Segundo, Luis Quintanilla, Jesús Arias Álvarez, Lourdes Enríquez, Jesús Manuel Hernández-Mangas, José Vicente:
A PLL-based synthesizer for tunable digital clock generation in a continuous-time SigmaDelta A/D converter. Integr. 42(1): 24-33 (2009)

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