"A three-stage single-miller CMOS OTA with no lower load capacitor limit."

P. Manikandan (2025)

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DOI: 10.1016/J.VLSI.2024.102269

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type: Journal Article

metadata version: 2024-09-09

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P. Manikandan:
A three-stage single-miller CMOS OTA with no lower load capacitor limit. Integr. 100: 102269 (2025)

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