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"Equidistance routing in high-speed VLSI layout design."

Yukiko Kubo et al. (2005)

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DOI: 10.1016/J.VLSI.2004.07.008

access: closed

type: Journal Article

metadata version: 2020-02-20

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  - https://dblp.org/rec/journals/integration/KuboMKT05
Yukiko Kubo, Hiroshi Miyashita, Yoji Kajitani, Kazuyuki Tateishi:
Equidistance routing in high-speed VLSI layout design. Integr. 38(3): 439-449 (2005)

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