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"A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for ..."

Jong-Ru Guo et al. (2005)

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DOI: 10.1016/J.VLSI.2004.07.005

access: closed

type: Journal Article

metadata version: 2024-02-29

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Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. Integr. 38(3): 525-540 (2005)

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